Course Information

  • Sessions 2 days
  • Duration 15 hrs
  • Level Intermediate
  • Assessment NA

Venue

12 Woodlands Square #07-85/86/87 Woods Square Tower 1, Singapore 737715. 5 mins walk from Woodlands (NS9) MRT station.

The venue is disabled-friendly.

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Certification

  • Certificate of Completion from Tertiary Infotech - Upon meeting at least 75% attendance and passing the assessment(s), participants will receive a Certificate of Completion from Tertiary Infotech.

FPGA Designer Training

Course Code: C421

What's This Course About

Embark on a transformative journey with FPGA Designer Training, meticulously tailored for those passionate about FPGA design and optimization. Dive deep into the intricate workings of both ALTERA and Xilinx FPGA architectures, garnering a robust understanding that sets the foundation for successful FPGA projects. Our course walks you through the detailed nuances of the tool flows of these leading FPGA technologies, ensuring a seamless design experience.

Venture beyond just architectural insights, embracing the art of writing synthesizable codes, which is the cornerstone of any FPGA project. Harness the power of in-built libraries, understanding their intricate functionalities, and leverage them for efficient FPGA designs. Additionally, the training accentuates the crucial stages of downloading code into FPGA and offers hands-on experience on its debugging features. By the end of this course, be well-equipped with the expertise to tackle any FPGA challenge, ensuring optimal designs and smooth project executions.

Funding Options

No funding is available for this course

Course Fee

$600.00 (GST-exclusive)
$654.00 (GST-inclusive)

Course Date

Course Time

* Required Fields

Additional Note

Please bring your own laptop for hands-on training. If you don't have laptop, we can provide spare laptop for training use.

Post-Course Support

  • We provide free consultation related to the subject matter after the course.
  • Please email your queries to enquiry@tertiaryinfotech.com and we will forward your queries to the subject matter experts.

Cancellation & Reschedule Policy

  • You can register your interest without upfront payment. There is no penalty for withdrawal of the course before the class commences.
  • We reserve the right to cancel or re-schedule the course due to unforeseen circumstances. If the course is cancelled, we will refund 100% for any paid amount.
  • Note the venue of the training is subject to changes due to availability of the classroom.

Course Details

Course Details

What You'll Learn

Topic 1: Introduction to FPGA

Cyclone/Stratix device Architecture

Introduction to Quartus II

Creating Project

Using Editor & Design Entry

Topic 2: Analysis and Elaboration

I/O Assignment

Configure voltage for I/0

I/O Assignment Analysis

Synthesis

Netlist Viewer

Topic 3: Constraints

Importance of Constraints in Design

Clock frequency

Asynchronous & Synchronous Design

False Path/Multicycle path

Topic 4: Debugging Tools

Power Analysis

SignalTap II embedded logic analyzer

JTAG Chain Debug Tool

In-System Memory Content Editor

Topic 5: Placing Design in FPGA

Fitter (Place & Route)

Chip Planner

Assembler (Generating Programming file)

Downloading Design in FPGA

Topic 6: Static Time analysis (STA)

Running TimeQuest Timing Analyzer

Understanding reports

Understand setup/hold violation & failing paths

Constraining and understanding TCL Commands

Course Info

Promotion Code

Your will get 10% discount voucher for 2nd course onwards if you write us a Google review.

Minimum Entry Requirement

Knowledge and Skills

  • Able to operate using computer functions
  • Minimum 3 GCE ‘O’ Levels Passes including English or WPL Level 5 (Average of Reading, Listening, Speaking & Writing Scores)

Attitude

  • Positive Learning Attitude
  • Enthusiastic Learner

Experience

  • Minimum of 1 year of working experience.

Target Age Group: 18-65 years old

Minimum Software/Hardware Requirement

Software:

TBD

Hardware: Window or Mac Laptops

Job Roles

Job Roles

  • Digital IC Aesigners
  • VHDL/VERILOG Arogrammers
  • FPGA Architects
  • Embedded design Engineers

Trainers

Trainers

Dr. Florence Choong

Dr. Florence Choong received the BEng. (First class) from Multimedia University, Malaysia in 2002. She then completed her Masters of Engineering Science (MEngSc) degree in Multimedia University, Cyberjaya in 2005 and Ph.D. in Engineering in 2012. Recently, she has completed her Masters in Business Administration (MBA) from the University of Derby, UK.

Upon graduation, she started her career in the telecommunications and networking industry where she served TM for three years in various departments such as networking, IT, quality assurance and customer service. Being passionate in research and training and educating the youth, she then moved to the academic and research line where she joined Multimedia University (MMU) as a lecturer in 2005. She then moved on to University Tunku Abdul Rahman (UTAR) in 2008 as a senior lecturer. She was the Head of the Electrical and Electronics Engineering department at Taylor’s University leading the program to its first accreditation. At present, she is a senior lecturer and is also very active in research. She has a total of more than 10 years of teaching experience. She is also a Chartered Engineer and is registered with the Board of Engineers Malaysia (BEM) and IEM. She is also the advisor to the Taylors IET On Campus.

She is author and co-author of numerous international journal and conference papers published by renowned journals in power quality, VLSI system design and artificial intelligence. Her current research interests are in the area of artificial intelligence, digital and VLSI design. She has also extended her skills and knowledge in this area through various consultancy works.

Sim Cher Khern

Sim Cher Khern (Sim CK) has over 20 years of working experience in a number of product development lifecycles, involving embedded firmware and FPGA programming, as well as high speed embedded system hardware design and PCB layout, where EMI/EMC considerations are critical for product delivery. He has also gained much project management experience and knowledge working with various operating systems (Windows, Linux, RTOS), networking technologies and web interface while developing the products.

Being a technology enthusiast, he keeps up with emerging technologies and likes to get his hands dirty with projects. In the process, he has picked up knowledge in full stack web development and its deployment to the cloud platform. He has also acquired knowledge on Cybersecurity threats, Network Defense and Ethical Hacking.

CK holds a MSc in Embedded Systems from Nanyang Technological University (NTU), as well as Cybersecurity certifications from EC-Council (ECSS, CND, CEH and CHFI).

His current area of interests include Cybersecurity, Embedded system hardware and firmware, IoT, Web technologies and Machine learning. They are intertwined in today’s business systems setup.

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